OrCAD選項中英對照DRC的目的，主要是為了在繪圖階段檢測出不合理的電氣特性，以及不合理的連接，甚至是single net等等，要把圖發給Layout之前，必須要做DRC檢測，至少得確定DRC沒有問題之後再發圖。
如下操作步驟:
1.點選Tools-->Design rule check，這邊勾選"Run Electrical Rules"，順便將View Output勾選，以便輸出檔案確認。
2.這邊將所有選項勾選，除了Check SDT compatibility，可參考OrCAD選項中英對照
3.確認後按下"確定"，會開始檢測，順便輸出檔案結果，結果如下。
如下操作步驟:
2.這邊將所有選項勾選，除了Check SDT compatibility，可參考OrCAD選項中英對照
3.確認後按下"確定"，會開始檢測，順便輸出檔案結果，結果如下。
--------------------------------------------------如果在檔案內有看到任何有問題的部分，請務必修改至正確為止。
Checking Schematic: AM3554 ULP-COM Module Board
--------------------------------------------------
Checking Electrical Rules
WARNING: [DRC0004] Possible pin type conflict U5,GPMC_A10 Output Connected to Bidirectional
AM3554 ULP-COM Module Board, P08) AM335x Section 1 of 3 (14.60, 9.60)
WARNING: [DRC0004] Possible pin type conflict U5,GPMC_A3 Output Connected to Bidirectional
AM3554 ULP-COM Module Board, P08) AM335x Section 1 of 3 (14.60, 8.90)
WARNING: [DRC0004] Possible pin type conflict U5,GPMC_A2 Output Connected to Bidirectional
AM3554 ULP-COM Module Board, P08) AM335x Section 1 of 3 (14.60, 8.80)
WARNING: [DRC0004] Possible pin type conflict U5,GPMC_A9 Output Connected to Bidirectional
AM3554 ULP-COM Module Board, P08) AM335x Section 1 of 3 (14.60, 9.50)
WARNING: [DRC0004] Possible pin type conflict U5,GPMC_A5 Output Connected to Bidirectional
AM3554 ULP-COM Module Board, P08) AM335x Section 1 of 3 (14.60, 9.10)
WARNING: [DRC0004] Possible pin type conflict U5,GPMC_A8 Output Connected to Bidirectional
AM3554 ULP-COM Module Board, P08) AM335x Section 1 of 3 (14.60, 9.40)
WARNING: [DRC0004] Possible pin type conflict U5,GPMC_A0 Output Connected to Bidirectional
AM3554 ULP-COM Module Board, P08) AM335x Section 1 of 3 (14.60, 8.60)
WARNING: [DRC0004] Possible pin type conflict U5,GPMC_A1 Output Connected to Bidirectional
AM3554 ULP-COM Module Board, P08) AM335x Section 1 of 3 (14.60, 8.70)
WARNING: [DRC0004] Possible pin type conflict U5,GPMC_A11 Output Connected to Bidirectional
AM3554 ULP-COM Module Board, P08) AM335x Section 1 of 3 (14.60, 9.70)
WARNING: [DRC0004] Possible pin type conflict U5,GPMC_A4 Output Connected to Bidirectional
AM3554 ULP-COM Module Board, P08) AM335x Section 1 of 3 (14.60, 9.00)
Checking For Single Node Nets
Checking For Unconnected Bus Nets
Checking Off-Page Connections
Checking Pin to Port Connections
Reporting Off-Grid Objects
Reporting Ports
Reporting Off-Page Connections
AM335X_MMC1_DAT6
AM335X_UART2_RXD
AM335X_UART0_TXD
AM335X_DDR_A10
ETHER_D0P
LVDSDATA2P
LVDSDATA0N
LCD_BKLT_EN
AM335X_GPIO_2_4
AM335X_MMC1_DAT7
AM335X_UART1_TXD
AM335X_USB1_DP
AM335X_UART3_RXD
AM335X_I2C0_SCL
AM335X_DDR_A11
AM335X_LCD_VSYNC
LVDSDATA1P
AM335X_GPIO_2_5
AM335X_MMC0_CLK
AM335X_UART2_TXD
AM335X_TOUCH_YN
AM335X_SPI0_SCLK
AM335X_USB0_ID
AM335X_USB0_DP
AM335X_I2C1_SCL
AM335X_DDR_A12
AM335X_DDR_BA0
AM335X_DDR_DQM0
AM335X_DDR_D0
LVDSDATA0P
AM335X_MMC1_CLK
AM335X_MMC0_SDCD
AM335X_TOUCH_XN
AM335X_I2C2_SCL
AM335X_UART3_TXD
AM335X_DDR_BA1
AM335X_DDR_DQM1
AM335X_DDR_A13
AM335X_DDR_D1
AM335X_DDR_D10
AM335X_MDIO_CLK
AM335X_RGMII2_RXCLK
AM335X_MMC2_CLK
AM335X_I2S0_SDIN
AM335X_SPI0_CS1#
AM335X_TOUCH_YP
AM335X_DDR_DQSn0
AM335X_DDR_D2
AM335X_DDR_CSn0
AM335X_DDR_BA2
AM335X_DDR_D11
AM335X_DDR_A14
AM335X_RGMII2_TXEN
AM335X_LCD_DATA20
AM335X_LCD_HSYNC
VCC3_PWRGD
AM335X_GPIO_3_7
AM335X_GPIO_0_30
EXT_WAKEUP
AM335X_SPI0_CS0#
AM335X_TOUCH_XP
PMIC_PWR_EN
AM335X_DDR_D3
AM335X_DDR_D12
AM335X_DDR_DQSn1
AM335X_DDR_A0
AM335X_RGMII2_TXCLK
AM335X_LCD_DATA10
LVDSCLKN
AM335X_LCD_DATA21
AM335X_LCD_AC_BIAS_EN
AM335X_GPIO_0_31
AM335X_GPIO_3_8
AM335X_I2C0_SDA
AM335X_DDR_D13
AM335X_DDR_A1
AM335X_DDR_CKn
AM335X_DDR_D4
AM335X_LCD_DATA22
AM335X_LCD_DATA11
AM335X_GPIO_3_13
AM335X_GPIO_0_21
AM335X_MMC0_POW
AM335X_I2C1_SDA
AM335X_DDR_A2
AM335X_DDR_D14
AM335X_DDR_D5
AM335X_LCD_DATA23
AM335X_LCD_DATA0
AM335X_LCD_DATA12
LVDSCLKP
PMIC_INT
RESET_IN#
CARRIER_STBY#
AM335X_I2C2_SDA
AM335X_GPIO_3_14
AM335X_DDR_A3
AM335X_DDR_D6
AM335X_DDR_D15
AM335X_LCD_DATA1
AM335X_LCD_DATA13
AM335X_I2S0_SDOUT
AM335X_DDR_D7
AM335X_DDR_A4
ETH_LED_10/100#
AM335X_RGMII2_TXD0
AM335X_LCD_DATA2
AM335X_LCD_DATA14
POWER_BTN#
AM335X_MMC2_DAT0
AM335X_GPIO_3_16
AM335X_I2S0_CLK
AM335X_USB0_DRVVBUS
PWR_SMPS1_FB
AM335X_DDR_RESET#
AM335X_DDR_D8
AM335X_DDR_A5
AM335X_RGMII2_TXD1
AM335X_LCD_DATA15
AM335X_LCD_DATA3
AM335X_MMC0_CMD
AM335X_MMC1_DAT0
AM335X_I2S0_LRCK
AM335X_MMC2_DAT1
AM335X_DDR_CASn
AM335X_DDR_A6
AM335X_DDR_D9
AM335X_RGMII2_RXD0
AM335X_RGMII2_TXD2
AM335X_LCD_DATA4
AM335X_LCD_DATA16
AM335X_MMC0_DAT0
AM335X_MMC1_CMD
AM335X_MMC1_DAT1
AUDIO_MCK
AM335X_MMC0_SDWP
AM335X_MMC2_DAT2
AM335X_UART0_CTSn
AM335X_DDR_A7
ETHER_D3N
AM335X_RGMII2_RXD1
AM335X_RGMII2_TXD3
AM335X_LCD_DATA5
AM335X_LCD_DATA17
VCC5_MOD_POK
CARR_SLEEP#
PMIC_GPIO
AM335X_GPIO_1_28
CLK32KOUT
AM335X_MMC1_DAT2
AM335X_MMC0_DAT1
AM335X_MMC2_DAT3
BOOT_SEL2#
LCD_PWM_OUT
AM335X_SPI0_D0
AM335X_MMC2_CMD
AM335X_DDR_RASn
AM335X_DDR_CK
AM335X_DDR_A8
AM335X_DDR_DQS0
ETHER_D2N
AM335X_RGMII2_RXD2
AM335X_LCD_DATA18
AM335X_LCD_DATA6
AM335X_MMC0_DAT2
AM335X_MMC1_DAT3
AM335X_GPIO_1_29
AM335X_SPI0_D1
AM335X_UART0_RTSn
AM335X_GPIO_0_28
AM335X_AIN4
BOOT_SEL1#
AM335X_DDR_A9
AM335X_DDR_CKE
AM335X_DDR_DQS1
AM335X_DDR_ODT
ETHER_D3P
ETH_LED_1000#
AM335X_RGMII2_RXD3
ETHER_D1N
LVDSDATA3N
AM335X_LCD_DATA19
AM335X_LCD_DATA7
AM335X_MMC1_DAT4
PMIC_nRESPWRON
AM335X_GPIO_2_1
AM335X_MMC0_DAT3
AM335X_AIN5
BOOT_SEL0#
AM335X_USB1_DM
AM335X_UART0_RXD
AM335X_DDR_WEn
AM335X_RGMII2_RXDV
ETHER_D0N
ETHER_D2P
ETH_LED_ACT#
SYS_RESETn
LVDSDATA2N
AM335X_LCD_PCLK
AM335X_LCD_DATA8
LCD_VDD_EN
AM335X_GPIO_2_2
AM335X_MMC1_DAT5
AM335X_AIN6
AM335X_USB0_DM
AM335X_UART1_RXD
ETHER_D1P
AM335X_MDIO_DATA
AM335X_LCD_DATA9
LVDSDATA1N
LVDSDATA3P
Reporting Globals
VCC5_CAR
VDDSHV6
VAUX2
VDIG1
VDAC
VDD_CORE
VDIG2
VDDH_PHY1
SPI_VCC3
EMMC_VCC3
GND_OSC0
D_REF
VDDIO1_REG
GND_RTC
VDDA_ADC
LVDSVCC3
USB0_VBUS
GNDA_ADC
LVDS_GND
GND
VPLL
VDDS_DDR
ETH1_AVDD_3V3
VDDSHV1
VBCKUPBAT
VDDSHV2
VRTC
VDD_MPU
GNDA_TSC
VDDSHV3
VDDS
VDDSHV4
VMMC
VAUX33
VCC5_MOD
VDDSHV5
VAUX1
VCC3
Reporting Net Names
AM335X_LCD_DATA11
LVDSDATA0N
GND
AM335X_LCD_DATA8
LVDSDATA2P
AM335X_LCD_DATA7
AM335X_LCD_HSYNC
AM335X_LCD_DATA17
LVDSDATA3N
AM335X_LCD_DATA23
AM335X_LCD_DATA18
AM335X_LCD_DATA16
AM335X_LCD_AC_BIAS_EN
AM335X_LCD_DATA6
AM335X_LCD_DATA10
AM335X_LCD_DATA3
LVDSCLKP
AM335X_LCD_DATA21
AM335X_LCD_DATA15
AM335X_LCD_DATA14
LVDS_GND
CLKSEL
AM335X_LCD_DATA20
AM335X_LCD_DATA0
LVDSDATA3P
AM335X_LCD_DATA9
LVDSVCC3
AM335X_LCD_DATA4
AM335X_LCD_DATA19
AM335X_LCD_DATA5
LVDSDATA0P
AM335X_LCD_DATA13
LVDSDATA1P
LVDSCLKN
AM335X_LCD_PCLK
AM335X_LCD_DATA22
AM335X_LCD_DATA2
LVDSDATA2N
SHTDNN
VCC3
AM335X_LCD_DATA1
AM335X_LCD_DATA12
LVDSDATA1N
AM335X_LCD_VSYNC
WOL_INT
ETHER_D2P
AM335X_RGMII2_RXD1
ETHER_D2N
AR8033_SD1
AM335X_RGMII2_TXD2
ETHER_D0N
AM335X_RGMII2_TXD3
GTX_CLK1
AR8033_AVDDL1
AR8033_LX1
ETHER_D1P
AM335X_RGMII2_RXD2
VDDH_PHY1
AR8033_XTLI1
AM335X_RGMII2_TXCLK
AR8033_RBIAS1
ETH_LED_ACT#
AM335X_RGMII2_TXD0
SYS_RESETN
DVDDL_PHY1
ETHER_D3P
AM335X_RGMII2_RXD3
AM335X_RGMII2_TXEN
AM335X_RGMII2_RXCLK
ETH_LED_1000#
AR8033_XTLO1
ETH_LED_10/100#
AM335X_MDIO_CLK
ETHER_D1N
RX1_CLK
AM335X_RGMII2_RXDV
AM335X_MDIO_DATA
AM335X_RGMII2_RXD0
ETHER_D0P
ETH1_AVDD_3V3
AM335X_RGMII2_TXD1
ETHER_D3N
ENET1_INT
VDDIO1_REG
AM335X_DDR_A10
AM335X_DDR_ODT
AM335X_DDR_D10
AM335X_DDR_D0
AM335X_DDR_RESET#
AM335X_DDR_A2
AM335X_DDR_RASN
AM335X_DDR_A1
AM335X_DDR_CKN
AM335X_DDR_BA0
AM335X_DDR_CKE
AM335X_DDR_A5
AM335X_DDR_D9
AM335X_DDR_D12
AM335X_DDR_D8
AM335X_DDR_D2
AM335X_DDR_CSN0
AM335X_DDR_BA2
AM335X_DDR_DQSN1
AM335X_DDR_D7
AM335X_DDR_A12
AM335X_DDR_CK
AM335X_DDR_A6
DDR3_ZQ
AM335X_DDR_DQS0
AM335X_DDR_D13
AM335X_DDR_A9
AM335X_DDR_D6
AM335X_DDR_A11
AM335X_DDR_D4
AM335X_DDR_D11
VDDS_DDR
AM335X_DDR_DQM1
AM335X_DDR_WEN
AM335X_DDR_A4
AM335X_DDR_A14
AM335X_DDR_A8
AM335X_DDR_DQM0
AM335X_DDR_CASN
AM335X_DDR_BA1
AM335X_DDR_A3
AM335X_DDR_DQS1
D_REF
AM335X_DDR_D5
AM335X_DDR_A0
AM335X_DDR_A13
AM335X_DDR_D3
AM335X_DDR_D14
AM335X_DDR_DQSN0
AM335X_DDR_D15
AM335X_DDR_A7
AM335X_DDR_D1
VDDSHV1
VPLL
VRTC
VDD_MPU_MON
VDDS
CAP_VDD_SRAM_MPU
VMMC
VDDSHV2
VDD_CORE
GNDA_ADC
CAP_VDD_SRAM_CORE
VAUX2
CAP_VBB_MPU
VDDSHV3
VDD_MPU
ENZ_KALDO_1P8V
VDDSHV6
VDIG2
VDDSHV4
VDD_RTC
VDAC
GND_OSC0
VDDA_ADC
PWR_SMPS1_FB
VDDSHV5
VAUX1
BOOT_SEL0#
AM335X_USB0_VBUS
LCD_AC_BIAS_EN
LCD_DATA6
AM335X_USB1_VBUS
AM335X_I2C1_SCL
AM335X_I2C1_SDA
AIN0
AM335X_SPI0_D0
AM335X_GPIO_3_13
LCD_DATA15
AM335X_MMC0_SDWP
N18706343
AM335X_MMC2_DAT0
LCD_DATA1
AM335X_I2S0_SDOUT
AM335X_USB1_DM
AM335X_UART2_TXD
LCD_DATA0
VCC5_MOD
AM335X_AIN4
AM335X_MMC2_DAT3
AM335X_UART0_TXD
AM335X_USB0_DP
AM335X_SPI0_D1
LCD_DATA11
AM335X_TOUCH_XN
AM335X_TOUCH_YP
BOOT_SEL2#
AM335X_I2C0_SDA
AM335X_I2C2_SDA
LCD_PWM_OUT
AM335X_SPI0_SCLK
LCD_PCLK
LCD_DATA4
AM335X_USB1_ID
AM335X_MMC0_POW
AM335X_UART3_TXD
AM335X_UART3_RXD
AM335X_MMC2_DAT2
AM335X_I2S0_CLK
AM335X_USB1_DP
PMIC_PWR_EN
AM335X_SPI0_CS1#
AM335X_TOUCH_XP
AM335X_UART0_RTSN
USB0_VBUS
AM335X_GPIO_0_21
AM335X_UART0_CTSN
LCD_HSYNC
AM335X_USB0_DM
LCD_DATA2
AM335X_MMC2_CLK
AIN4
LCD_DATA12
AM335X_I2C0_SCL
AM335X_AIN6
AM335X_I2C2_SCL
AM335X_USB0_ID
AM335X_SPI0_CS0#
GNDA_TSC
AIN5
AM335X_I2S0_LRCK
LCD_DATA3
AM335X_UART1_TXD
AIN2
AM335X_AIN5
AM335X_GPIO_3_16
LCD_DATA13
AM335X_USB0_DRVVBUS
AIN6
AUDIO_MCK
AM335X_UART0_RXD
LCD_DATA7
AIN1
AIN3
AM335X_TOUCH_YN
N18706324
AM335X_MMC2_DAT1
EXT_WAKEUP
AM335X_GPIO_0_28
AM335X_MMC2_CMD
LCD_DATA5
LCD_DATA8
LCD_DATA9
AM335X_I2S0_SDIN
AM335X_UART1_RXD
LCD_DATA14
LCD_VSYNC
CARRIER_STBY#
BOOT_SEL1#
AM335X_GPIO_3_14
LCD_DATA10
AM335X_UART2_RXD
AM335X_MMC0_DAT2
AM335X_JTAG_TCK
AM335X_MMC0_DAT0
GND_RTC
LCD_DATA17
AM335X_MMC1_DAT1
MPU_XTALIN
AM335X_JTAG_TDO
AM335X_MMC1_DAT5
PMIC_NRESPWRON
AM335X_GPIO_2_2
AM335X_GPIO_1_29
PMIC_INT
AM335X_MMC0_DAT1
32KOUT_1V8
LCD_DATA19
AM335X_MMC1_DAT0
LCD_DATA21
PMIC_GPIO
DDR_VTP
AM335X_MMC0_SDCD
AM335X_JTAG_TRSTN
AM335X_MMC1_DAT3
AM335X_MMC1_CMD
AM335X_TIMER6
CLK32KOUT
AM335X_MMC1_DAT2
AM335X_GPIO_3_7
AM335X_MMC0_DAT3
AM335X_JTAG_TDI
AM335X_GPIO_1_28
AM335X_GPIO_2_5
LCD_DATA23
AM335X_GPIO_2_4
LCD_DATA22
AM335X_MMC0_CMD
LCD_VDD_EN
RTC_XTALIN
RESET_IN#
AM335X_JTAG_TMS
MPU_XTALOUT
AM335X_MMC1_CLK
AM335X_GPIO_3_8
WARMRSTN
AM335X_MMC1_DAT7
AM335X_GPIO_2_1
AM335X_GPIO_0_30
AM335X_MMC1_DAT6
RTC_PWRONRSTN
AM335X_MMC1_DAT4
LCD_DATA20
LCD_DATA18
AM335X_MMC0_CLK
LCD_BKLT_EN
AM335X_GPIO_0_31
LCD_DATA16
PWR_VAUX33
PMIC_I2C_SCL
PWR_VDD1_SMPS
PMIC_SDASR
PMIC_VREF
PMIC_CKSYNC
PWR_VDD2_SMPS
POWER_BTN#
CARR_SLEEP#
PWR_VDDIO
PWR_VAUX1
PWR_SMPS1
PMIC_SCLSR
PWR_VAUX2
PWR_SMPS2
NRESPWRON
PWR_VDIG1
OSC32KOUT
PWR_SWIO
SW3
PMIC_INT1
PMIC_SLP
PWR_VDAC
VAUX33
VDIG1
PWR_VPLL
PWR_VIO_SMPS
VBCKUPBAT
PWR_VMMC
PWR_VDIG2
PMIC_PWRHOLD
OSC32KIN
PMIC_I2C_SDA
PWON_LED
VCC3_PWRGD#
VCC5_MOD_POK
737_FB
VCC3_PWRGD
VCC3_RAIL
LEDP
737_EN
VCC5_IN
VCC5_MOD_ON
1V8_I2C1_SDA
VCC5_MOD_POK_1
GBE_CTREF
IO_SEL
VCC5_CAR
AFB7
VCC5_MOD_POK#
SPI0_CS0N
VIN_PWR_BAD#
VCC5_MOD_POK_2
AFB9
SER3_RX
DCAN0_RX
VCC5_MOD_DRV
VCC5_MOD_DIS
SER3_TX
PCIE_WAKE#
VIN_PWR_BAD#_R
AFB8
DCAN0_TX
1V8_I2C1_SCL
ECLK
HOLD
ECMD
EDAT1
EDAT7
CSN
EMMC_VDDI
EDAT6
EMMC_VCC3
EDAT0
EDAT3
EDAT4
EDAT5
WP
SPI_VCC3
EDAT2
Checking Misleading Tap connection
Check Bus width mismatch
留言
張貼留言